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PD - 94990
HEXFET(R) Power MOSFET
Advanced Process Technology Dynamic dv/dt Rating l 175C Operating Temperature l Fast Switching l Fully Avalanche Rated l Lead-Free Description
l l
IRFZ24NPBF
D
VDSS = 55V
G S
RDS(on) = 0.07 ID = 17A
Fifth Generation HEXFET (R) power MOSFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. The TO-220 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 watts. The low thermal resistance and low package cost of the TO-220 contribute to its wide acceptance throughout the industry.
TO-220AB
Absolute Maximum Ratings
Parameter
I D @ TC = 25C I D @ TC = 100C I DM PD @TC = 25C VGS EAS I AR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current # Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw.
Max.
17 12 68 45 0.30 20 71 10 4.5 5.0 -55 to + 175 300 (1.6mm from case) 10 lbfin (1.1Nm)
Units
A W W/C V mJ A mJ V/ns C
Thermal Resistance
Parameter
RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient
Min.

Typ.
0.50
Max.
3.3 62
Units
C/W
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1
2/10/04
IRFZ24NPBF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
RDS(on) VGS(th) g fs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance
Min. 55 2.0 4.5
Typ. 0.052 4.9 34 19 27
Max. Units Conditions V VGS = 0V, ID = 250A V/C Reference to 25C, ID = 1mA 0.07 VGS = 10V, ID = 10A 4.0 V VDS = VGS, ID = 250A S VDS = 25V, ID = 10A 25 VDS = 55V, VGS = 0V A 250 VDS = 44V, VGS = 0V, TJ = 150C 100 VGS = 20V nA -100 VGS = -20V 20 ID = 10A 5.3 nC VDS = 44V 7.6 VGS = 10V, See Fig. 6 and 13 VDD = 28V ID = 10A ns RG = 24 RD = 2.6, See Fig. 10 Between lead, 4.5 6mm (0.25in.) nH from package 7.5 and center of die contact 370 VGS = 0V 140 pF VDS = 25V 65 = 1.0MHz, See Fig. 5
D
G S
Source-Drain Ratings and Characteristics
IS
I SM
VSD t rr Q rr
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge
Min. Typ. Max. Units 56 120 17 68 1.3 83 180 V ns nC A
Conditions MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = 10A, VGS = 0V TJ = 25C, IF = 10A di/dt = 100A/s
D
G S
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
ISD 10A, di/dt 280A/s, VDD V(BR)DSS,
TJ 175C
VDD = 25V, starting TJ = 25C, L = 1.0mH
RG = 25, IAS = 10A. (See Figure 12)
Pulse width 300s; duty cycle 2%.
2
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IRFZ24NPBF
100
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
100
I , Drain-to-Source Current (A) D
10
I , Drain-to-Source Current (A) D
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
10
4.5V
4.5V 20s PULSE WIDTH TC = 25C
1 10
1 0.1
A
100
1 0.1
20s PULSE WIDTH TC = 175C
1 10 100
A
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics, TJ = 25oC
Fig 2. Typical Output Characteristics, TJ = 175oC
100
3.0
R DS(on) , Drain-to-Source On Resistance (Normalized)
I D = 17A
I D , Drain-to-Source Current (A)
2.5
TJ = 25C TJ = 175C
2.0
10
1.5
1.0
0.5
1 4 5 6 7
V DS = 25V 20s PULSE WIDTH
8 9 10
A
0.0 -60 -40 -20 0 20 40 60
VGS = 10V
80 100 120 140 160 180
A
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature (C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRFZ24NPBF
700 600
C, Capacitance (pF)
500
Ciss
400
Coss
300
V GS , Gate-to-Source Voltage (V)
V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd C oss = C ds + C gd
20
I D = 10A V DS = 44V V DS = 28V
16
12
8
200
Crss
4
100
0 1 10 100
A
0 0 4 8
FOR TEST CIRCUIT SEE FIGURE 13
12 16 20
A
VDS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
1000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY R DS(on)
TJ = 175C TJ = 25C
10
I D , Drain Current (A)
100 10s
10
100s
1 0.4 0.6 0.8 1.0 1.2 1.4 1.6
VGS = 0V
1.8
A
1 1
TC = 25C TJ = 175C Single Pulse
10
1ms 10ms
2.0
100
A
VSD , Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFZ24NPBF
20
VDS V GS
RD
16
RG 10V
D.U.T.
+
ID, Drain Current (Amps)
- VDD
12
Pulse Width 1 s Duty Factor 0.1 %
8
Fig 10a. Switching Time Test Circuit
VDS 90%
4
0 25 50 75 100 125 150
A
175
TC , Case Temperature (C)
10% VGS
td(on) tr t d(off) tf
Fig 9. Maximum Drain Current Vs. Case Temperature
10
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
D = 0.50
1
0.20 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE)
Notes: 1. Duty factor D = t /t
P DM
0.1
t 1 t2
1 2
0.01 0.00001
2. Peak TJ = PDM x Z thJC + T C
A
1
0.0001
0.001
0.01
0.1
t 1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFZ24NPBF
EAS , Single Pulse Avalanche Energy (mJ)
VDS L
140
D.U.T. RG + V - DD
TOP
120
BOTTOM
ID 4.2A 7.2A 10A
100
10 V
IAS tp
0.01
80
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp VDD VDS
60
40
20
0
VDD = 25V
25 50 75 100 125 150
175
A
Starting TJ , Junction Temperature (C)
IAS
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
10 V
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRFZ24NPBF
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET(R) power MOSFETs
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IRFZ24NPBF
TO-220AB Package Outline
2.87 (.113) 2.62 (.103) 10.54 (.415) 10.29 (.405) 3.78 (.149) 3.54 (.139) -A6.47 (.255) 6.10 (.240)
Dimensions are shown in millimeters (inches)
-B4.69 (.185) 4.20 (.165) 1.32 (.052) 1.22 (.048)
4 15.24 (.600) 14.84 (.584)
1.15 (.045) MIN 1 2 3
LEAD ASSIGNMENTS IGBTs, CoPACK 1 - GATE 21- GATE DRAIN 1- GATE 32- DRAINSOURCE 2- COLLECTOR 3- SOURCE 3- EMITTER 4 - DRAIN
LEAD ASSIGNMENTS
HEXFET
14.09 (.555) 13.47 (.530)
4- DRAIN
4.06 (.160) 3.55 (.140)
4- COLLECTOR
3X 3X 1.40 (.055) 1.15 (.045)
0.93 (.037) 0.69 (.027) M BAM
3X
0.55 (.022) 0.46 (.018)
0.36 (.014)
2.54 (.100) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH
2.92 (.115) 2.64 (.104)
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
E XAMPL E : T HIS IS AN IR F 1010 LOT CODE 1789 AS S E MB L E D ON WW 19, 1997 IN T H E AS S E MB L Y LINE "C" INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE PAR T NU MB E R
Note: "P" in assembly line position indicates "Lead-Free"
DAT E CODE YE AR 7 = 1997 WE E K 19 L INE C
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.02/04
8
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